Modern digital chip design, with emphasis on key design concepts, methodology and flow using state-of-the-art electronic design automation (EDA) tools and standard cell libraries from the semiconductor industry. Topics include CMOS transistor operations, interconnect, dynamic/leakage power, delay, RTL coding, logic synthesis, static timing analysis, formal verification, RTL/gate level simulation and physical design. The course consists of a set of labs and a project built upon multiple Synopsys EDA tools, including Design Compiler, PrimeTime, Formality, VCS etc.